R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 941

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
1. Change the value of the PSTOP1 bit from 0 to 1 to fix the Bφ output at the high level (given
2. Clear the IOKEEP bit to 0 to end retention of the Bφ state.
3. Clear the PSTOP1 bit to 0 to enable Bφ output.
For the port state when the IOKEEP bit is set to 1, see section 24.8.3, Pin State on Exit from Deep
Software Standby Mode.
24.8.5
The WTSTS5 to WTSTS0 bits in DPSWCR should be set as follows:
1. Using a crystal resonator
2. Using an external clock
that the Bφ output was already fixed high).
Specify the WTSTS5 to WTSTS0 bits so that the standby time is at least equal to the
oscillation settling time. Table 24.3 shows EXTAL input clock frequencies and the standby
time according to WTSTS5 to WTSTS0 settings.
The PLL circuit settling time should be considered. See table 24.3 to set the standby time.
(1) B φ output cannot be guaranteed.
(2) The procedure to guarantee B φ output is used.
Setting Oscillation Settling Time after Exit from Deep Software Standby Mode
Figure 24.3 Bφ Operation after Exit from Deep Software Standby Mode
Oscillator
NMI
Internal reset
When IOKEEP = 0
When IOKEEP = 1
(IOKEEP=1)
Deep software standby mode
Clock is undefined
When IOKEEP = 1, the clock can be normally output
by using the PSTOP1 bit.
Rev. 2.00 Sep. 16, 2009 Page 911 of 1036
PSTOP1
set
IOKEEP
IOKEEP
cleared
cleared
Section 24 Power-Down Modes
PSTOP1
cleared
REJ09B0414-0200

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