R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 1062

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CPU priority control function
over DTC and DMAC ............................ 136
Crystal resonator..................................... 875
Cycle stealing mode................................ 297
D
D/A converter ......................................... 769
Data direction register ............................ 385
Data register............................................ 386
Data transfer controller (DTC) ............... 339
Direct convention ................................... 663
DMA controller (DMAC)....................... 259
Double-buffered structure....................... 637
Download pass/fail result parameter....... 795
DTC vector address ................................ 352
DTC vector address offset ...................... 352
Dual address mode.................................. 286
E
Endian and data alignment ..................... 199
Endian format ......................................... 191
Error protection ...................................... 831
Error signal ............................................. 663
Exception handling ................................... 85
Exception handling vector table ............... 86
Exception-handling state .......................... 68
Extended repeat area............................... 283
Extended repeat area function ................ 299
Extension of chip select (CS)
assertion period....................................... 212
External access bus................................. 180
External bus ............................................ 185
External bus clock (Bφ) .................. 181, 869
External bus interface ............................. 190
External clock......................................... 876
External interrupts .................................. 120
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REJ09B0414-0200
F
Flash erase block select parameter.......... 804
Flash memory ......................................... 777
Flash multipurpose address area
parameter ................................................ 802
Flash multipurpose data destination
parameter ................................................ 803
Flash pass and fail parameter .................. 796
Flash program/erase frequency
parameter ........................................ 801, 814
Free-running count operation.................. 481
Frequency divider ........................... 869, 877
Full address mode ................................... 350
Full-scale error........................................ 730
H
Hardware protection ............................... 830
Hardware standby mode ................. 882, 919
I
I/O ports .................................................. 377
I
I
ID code.................................................... 648
Idle cycle................................................. 238
Illegal instruction ................................ 97, 99
Input buffer control register .................... 387
Input Capture Function ........................... 484
Internal interrupts.................................... 121
Internal peripheral bus ............................ 180
Internal system bus ................................. 180
Interrupt .................................................... 95
Interrupt control mode 0 ......................... 127
Interrupt control mode 2 ......................... 129
Interrupt controller.................................. 103
Interrupt exception handling
sequence.................................................. 131
2
2
C bus format......................................... 697
C bus interface2 (IIC2)......................... 681