R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 21

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.5
Section 14 8-Bit Timers (TMR).........................................................................553
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
13.4.4
13.4.5
13.4.6
13.4.7
13.4.8
Usage Notes ...................................................................................................................... 552
13.5.1
13.5.2
Features............................................................................................................................. 553
Input/Output Pins.............................................................................................................. 558
Register Descriptions........................................................................................................ 559
14.3.1
14.3.2
14.3.3
14.3.4
14.3.5
14.3.6
Operation .......................................................................................................................... 574
14.4.1
14.4.2
Operation Timing.............................................................................................................. 576
14.5.1
14.5.2
14.5.3
14.5.4
14.5.5
14.5.6
Operation with Cascaded Connection............................................................................... 579
14.6.1
14.6.2
Interrupt Sources............................................................................................................... 580
14.7.1
14.7.2
Usage Notes ...................................................................................................................... 583
14.8.1
14.8.2
14.8.3
Example of Non-Overlapping Pulse Output
(Example of 4-Phase Complementary Non-Overlapping Pulse Output)........... 548
Non-Overlapping Pulse Output......................................................................... 545
Sample Setup Procedure for Non-Overlapping Pulse Output ........................... 547
Inverted Pulse Output ....................................................................................... 550
Pulse Output Triggered by Input Capture ......................................................... 551
Module Stop Function Setting .......................................................................... 552
Operation of Pulse Output Pins......................................................................... 552
Timer Counter (TCNT)..................................................................................... 561
Time Constant Register A (TCORA)................................................................ 561
Time Constant Register B (TCORB) ................................................................ 562
Timer Control Register (TCR).......................................................................... 562
Timer Counter Control Register (TCCR) ......................................................... 564
Timer Control/Status Register (TCSR)............................................................. 569
Pulse Output...................................................................................................... 574
Reset Input ........................................................................................................ 575
TCNT Count Timing ........................................................................................ 576
Timing of CMFA and CMFB Setting at Compare Match................................. 577
Timing of Timer Output at Compare Match ..................................................... 577
Timing of Counter Clear by Compare Match ................................................... 578
Timing of TCNT External Reset....................................................................... 578
Timing of Overflow Flag (OVF) Setting .......................................................... 579
16-Bit Counter Mode ........................................................................................ 579
Compare Match Count Mode............................................................................ 580
Interrupt Sources and DTC Activation ............................................................. 580
A/D Converter Activation................................................................................. 582
Notes on Setting Cycle...................................................................................... 583
Conflict between TCNT Write and Counter Clear............................................ 583
Conflict between TCNT Write and Increment.................................................. 584
Rev. 2.00 Sep. 16, 2009 Page xix of xxviii