R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 762

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 A/D Converter
18.7
18.7.1
Operation of the A/D converter can be disabled or enabled using the module stop control register.
The initial setting is for operation of the A/D converter to be halted. Register access is enabled by
clearing the module stop state. When placing the A/D converter in the module stop state after it
performed A/D conversion, be sure to set both of the CKS1 and CKS0 bits to 1 and clear all of the
ADST, TRGS1, TRGS0, and EXTRGS bits to 0 to disable A/D conversion. After that, dummy-
read the ADCSR register and then set the module stop control register. For details on the module
stop control register, see section 24, Power-Down Modes.
18.7.2
When this LSI enters software standby mode with A/D conversion enabled, the analog inputs are
retained, and the analog power supply current is equal to as during A/D conversion. If the analog
power supply current needs to be reduced in software standby mode, set both of the CKS1 and
CKS0 bits to 1 and clear all of the ADST, TRGS1, TRGS0, and EXTRGS bits to 0 to disable A/D
conversion. After that, dummy-read the ADCSR register and then enter software standby mode.
18.7.3
If any of actions (1 to 3 below) is performed while activation by an external trigger* is in use,
stopping A/D conversion may be impossible.
Note: * External trigger refers to input on the ADTRG pin or the conversion trigger from a
1. When the setting for activation by an external trigger is in use, writing to change the value of
2. Changing the setting from activation by an external trigger to prohibition of A/D conversion
3. Changing the scan mode (SCANE and ADSTLCR bits; from continuous scan mode to single
Rev. 2.00 Sep. 16, 2009 Page 732 of 1036
REJ09B0414-0200
the ADST bit in ADCSR from 0 to 1.
start by an external trigger.
mode or one-cycle scan mode) while the setting for activation by an external trigger is in use.
Usage Notes
Module Stop Function Setting
A/D Input Hold Function in Software Standby Mode
Notes on A/D Conversion Start by an External Trigger
peripheral module (TMR or TPU).