R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 501

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.3.4
TIER controls enabling or disabling of interrupt requests for each channel. The TPU has six TIER
registers, one for each channel.
Bit
7
6
5
4
Bit
Bit Name
Initial Value
R/W
Bit Name
TTGE

TCIEU
TCIEV
Timer Interrupt Enable Register (TIER)
TTGE
R/W
7
0
0
Initial
value
1
0
0

R
6
1
R/W
R/W
R
R/W
R/W
TCIEU
R/W
5
0
Description
A/D Conversion Start Request Enable
Enables/disables generation of A/D conversion and
∆Σ A/D conversion start requests by TGRA input
capture/compare match.
0: A/D conversion and ∆Σ A/D conversion start request
1: A/D conversion and ∆Σ A/D conversion start request
Reserved
This is a read-only bit and cannot be modified.
Underflow Interrupt Enable
Enables/disables interrupt requests (TCIU) by the TCFU
flag when the TCFU flag in TSR is set to 1 in channels 1,
2, 4, and 5.
In channels 0 and 3, bit 5 is reserved. It is always read as
0 and cannot be modified.
0: Interrupt requests (TCIU) by TCFU disabled
1: Interrupt requests (TCIU) by TCFU enabled
Overflow Interrupt Enable
Enables/disables interrupt requests (TCIV) by the TCFV
flag when the TCFV flag in TSR is set to 1.
0: Interrupt requests (TCIV) by TCFV disabled
1: Interrupt requests (TCIV) by TCFV enabled
generation disabled
generation enabled
TCIEV
R/W
4
0
TGIED
R/W
3
0
Rev. 2.00 Sep. 16, 2009 Page 471 of 1036
Section 12 16-Bit Timer Pulse Unit (TPU)
TCIEC
R/W
2
0
TGIEB
R/W
1
0
REJ09B0414-0200
TGIEA
R/W
0
0