R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 929

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
24.2.8
DPSIEGR selects the rising or falling edge to clear deep software standby mode.
DPSIEGR is initialized by input of the reset signal on the RES pin, but is not initialized by the
internal reset signal upon exit from deep software standby mode.
Bit
7
6 to 4
3
2
1
Bit
Bit name
Initial value:
R/W:
Bit Name
DNMIEG
DIRQ3EG 0
DIRQ2EG 0
DIRQ1EG 0
Deep Standby Interrupt Edge Register (DPSIEGR)
DNMIEG
R/W
7
0
Initial
Value
0
All 0
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
5
0
Module
NMI Edge Select
Selects the active edge for NMI pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
Reserved
These bits are always read as 0. The write value should
always be 0.
IRQ3 Interrupt Edge Select
Selects the active edge for IRQ3 pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
IRQ2 Interrupt Edge Select
Selects the active edge for IRQ2 pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
IRQ1 Interrupt Edge Select
Selects the active edge for IRQ1 pin input.
0: The interrupt request is generated by a falling edge.
1: The interrupt request is generated by a rising edge.
R/W
4
0
DIRQ3EG
R/W
3
0
Rev. 2.00 Sep. 16, 2009 Page 899 of 1036
DIRQ2EG
R/W
2
0
Section 24 Power-Down Modes
DIRQ1EG
R/W
1
0
REJ09B0414-0200
DIRQ0EG
R/W
0
0

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