PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 91

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PEF22827EL-V11

Manufacturer Part Number
PEF22827EL-V11
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22827EL-V11

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 29
Address (Hex) Parameter
Bank 1 Bank 2
7879
787A
787B
787C
787D
787E
787F
Preliminary Data Sheet
F879
F87A
F87B
F87C
F87D
F87E
F87F
WS_STP Parameter Mapping in EEPROM (page 3 of 3)
INTERLEAVER_I
FAST_SIZE_DS
FAST_SIZE_US
FFEC_SIZE_LT
FFEC_SIZE_NT
SFEC_SIZE_LT
SFEC_SIZE_NT
91
Description
Denominator for calculating interleaver
block length, where:
Bit 1 is for upstream, and 0 = 4, 1= 8
Bit 0 is for downstream, and 0 = 4, 1= 8
See
Length of downstream fast channel, in
bytes.
Length of upstream fast channel, in bytes.
Bits 7:4 specify upstream reception FFEC.
Bits 3:0 specify upstream transmission
FFEC.
Note: To receive real FFEC/SFEC values,
For Bits 7:4 specify downstream reception
FFEC.
Bits 3:0 specify downstream transmission
FFEC.
Note: To receive real FFEC/SFEC values,
Bits 7:4 specify upstream reception SFEC.
Bits 3:0 specify upstream transmission
SFEC.
Note: To receive real FFEC/SFEC values,
Bits 7:4 specify downstream reception
SFEC.
Bits 3:0 specify downstream transmission
SFEC.
Note: To receive real FFEC/SFEC values,
“Interleaving” on Page 63
multiply this setting by 2. See page
111 for additional information.
multiply this setting by 2. See page
111 for additional information.
multiply this setting by 2. See page
111 for additional information.
multiply this setting by 2. See page
111 for additional information.
Operation – Digital Block
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827
for details.

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