PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 11

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table of Contents
10.15.3
10.15.4
10.15.5
10.16
10.16.1
10.16.2
10.16.3
10.16.4
10.16.5
10.16.6
10.16.7
10.16.8
10.16.9
10.16.10
10.16.11
10.16.12
10.16.13
10.16.14
10.16.15
10.16.16
10.17
10.17.1
10.17.2
10.17.3
10.17.4
10.17.5
11
11.1
11.2
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
11.2.6
11.2.7
11.2.8
11.2.9
11.2.10
11.2.11
Preliminary Data Sheet
Rate Adaptive Module Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
Notch Filter Registers Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
Memory and Register Descriptions – Analog Block . . . . . . . . . . . . . 255
Register Overview – Analog Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Detailed Register Descriptions – Analog Block . . . . . . . . . . . . . . . . . . . . 255
PBO US2 Distance Register (PBO_US2D) . . . . . . . . . . . . . . . . . . . . . 236
PBO Maximum PSD Register (PBO_MAXPSD) . . . . . . . . . . . . . . . . . 237
PBO Minimum PSD Register (PBO_MINPSD) . . . . . . . . . . . . . . . . . . 237
Rate Adaptive Command Register (RA_COMMAND) . . . . . . . . . . . . . 238
RA Minimum Noise Margin for D1 (RA_MN_MRG_D1) . . . . . . . . . . . 239
RA Maximum Downstream Rate Register (RA_MX_RATE_DS) . . . . . 240
RA Maximum Upstream Rate Register (RA_MX_RATE_US) . . . . . . . 240
RA Center Frequency for D1 Register (RA_CF_D1) . . . . . . . . . . . . . . 241
RA Symbol Rate (SR) for D1 Register (RA_SR_D1) . . . . . . . . . . . . . . 242
RA Power Spectral Density (PSD) for D1 Register (RA_PSD_D1) . . . 243
RA PSD Mask Register (RA_PSD_MASK) . . . . . . . . . . . . . . . . . . . . . 244
RA PSD Maximum Level, DS1 Register (RA_PSD_MAX) . . . . . . . . . 244
RA Interleaver Delay DS (RA_INTR_DS) . . . . . . . . . . . . . . . . . . . . . . 245
RA Interleaver Delay US (RA_INTR_US) . . . . . . . . . . . . . . . . . . . . . . 245
RA Process Minimum Noise Margin for US0 (RA_MN_MRG_U0) . . . 246
RA TLAN PSD Maximum Level, DS1 Register ((RA_TLAN _PSD_
MAX_DS1) 246
RA Process Status Register (RA_STATUS) . . . . . . . . . . . . . . . . . . . . 247
RA Process Rerun Counter (RA_RESTRT_CNT) . . . . . . . . . . . . . . . . 247
D1 Band Use as a Result of RA Process (RA_RSLT_D1) . . . . . . . . . 248
Notch Filter Coefficient NTCHA1 (DS1), Low Byte (NTCHA1_L) . . . . 249
Notch Filter Coefficient NTCHA2 (DS1), Low Byte (NTCHA2_L) . . . . 250
Notch Filter Coefficients NTCHA2 and NTCHA1 (DS1), High Bits
(NTCHA_H) 251
Notch Filter Coefficient NTCHB (DS1), Low Bits (NTCHB_L) . . . . . . . 252
Notch Filter Coefficient NTCHB (DS1), High Bits (NTCHB_H) . . . . . . 253
ADC Operation Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
DAC Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
PREFI and POFI Power Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
ACE, Measurement Buffer and AGC Mode . . . . . . . . . . . . . . . . . . . . . 257
Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
Value for AGC Gain Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Analog Loop and Bias Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
Digital Crystal Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Corner Frequency and Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Wake-up, PLL, Tuning and RFS Status . . . . . . . . . . . . . . . . . . . . . . . . 262
Clock, Test, Crystal and Tuning Parameters . . . . . . . . . . . . . . . . . . . . 263
11
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827
Page