PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 46

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PEF22827EL-V11

Manufacturer Part Number
PEF22827EL-V11
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22827EL-V11

Lead Free Status / RoHS Status
Supplier Unconfirmed
2.3.6
Table 7
Table 7
Pin
E14
D14
2.3.7
Table 8
Table 8
Pin
B14
C14
2.3.8
Table 10
Table 9
Pin
G14
P2
G15
M3
Preliminary Data Sheet
Name
URTRX
URTTX
Name
I
I
2
2
describes pins that connect to the UART line.
describes pins that enable read and write access to the EEPROM.
Name
TCK
TDI_A
TDI_D
TDO_A
CD
CCLK
describes JTAG pins.
UART Pins
EEPROM Pins
Test Pins
UART Host and Parallel Port Pins
EEPROM Pins
JTAG Pins (page 1 of 2)
Pin
Type
I
AI
I
AO
Pin
Type
I/O
I/O
Pin
Type
I
O
Buffer
Type
-
-
-
-
Pull
-
-
Buffer
Type
-
-
Table 10
Function
JTAG Test Clock
For testing only. Tie to 0 in normal mode.
Analog JTAG Test Serial Data In
For testing only. Tie to 0 in normal mode.
Digital JTAG Test Serial Data Input
For testing only. Tie to 0 in normal mode.
Analog JTAG Test Serial Data Out
For testing only.
Function
I
Used to read or write data to EEPROM. It is open
drain and requires a pull-up resistor.
I
Clock signal to EEPROM that is open drain and
requires a pull-up resistor.
Function
UART Reception Line
UART Transmission Line
2
2
C Data
C Clock
describes other test pins.
46
Pin and Signal Descriptions
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827

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