PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 215

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

10.11.2
Bits 4:0 of the
reset, the value of these bits is determined by sampling the PHY_ADD configuration
pins.
MII_REG
Register Address of the Slave MII
Field
Res
REG_ADD
10.11.3
The 16-bit
slave. The address of the low byte is 8CB2
MII_D
Data to or from Slave Register
Field
MII_DATA
10.11.4
Bits 1:0 of the
Preliminary Data Sheet
15
7
14
MII_D
Register Address of the Slave MII (MII_REG)
Data to or from Slave Register (MII_D)
MII Command Register (MII_CMD)
13
MII_REG
MII_CMD
Res
rw
6
Bits Typ
7:5
4:0
Bits Typ
15:0 rw
register holds data to write to the MII slave or a result from the MII
12
e
rw
rw
e
register specify the register address in the slave MII. During hard
11
register enable or disable MII read and write operations.
5
Description
Reserved
Register Address in the Slave MII
Description
Data to Write to MII Slave or Result from MII Slave
10
9
(8CB3
4
MII_DATA
(8CB1
8
215
H
rw
H
:8CB2
and of the high byte is 8CB3
H
7
)
3
H
)
6
REG_ADD
5
Reset Value: PHY_ADD pins
rw
2
4
Reset Value: 0000
3
Rev. 1.1, 2005-01-30
1
2
H
VDSL6100i
.
PEF 22827
1
0
0
H