PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 137

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

cycles, respectively. For detailed timing diagrams of read and write cycles, see
Host Interface” on Page
Table 44 Parallel Port Signals
Name
PA3:PA0
PD7:PD0
PCS
PWE
POE
PINT
Figure 24
Figure 25
Preliminary Data Sheet
PA[3:0]
PCS
PWE
PD[7:0]
PA[3:0]
PCS
POE
PD[7:0]
Input/Output
Input
Input/Output
Input
Input
Input
Output
Typical Parallel Port Read Cycle
Typical Parallel Port Write Cycle
271.
Comment
Parallel port address - See
Parallel Data
Parallel Chip Select - Must be 0 for parallel port read or
write operations.
Parallel port Write Enable - Data is latched when PWE is
asserted (0). Valid only when PCS is also asserted (0).
Parallel port Output Enable - Data is latched when POE
is asserted (0). Valid only when PCS is also asserted (0).
Interrupt Request - Open drain output signal.
Valid Address
Valid Address
Valid Data
137
Valid Data
Table
45.
PP_read_cycle
PP_write_cycle
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827
Interfaces
“Parallel