PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 147

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Field
LPBK
SPEED
ANEGEN
Res
ISOLATE
RESANEG
DUPLEX
COL
Res
RESET_DIS
ABLE
Basic Mode Status Register (BMSR)
The 16-bit
management interface (SMI).
An external host can access this register, via the SMI interface at the Standard compliant
SMI address of 01
Preliminary Data Sheet
BMSR
Bits Type Description
11
7
0
14
13
12
10
9
8
6:1
H
.
register contains the status of basic operation of the serial
Enable echo loop back in which data is echoed back on the
Ethernet interface pins without intervention by logic.
0
1
Speed specification bit.
0
1
Automatic negotiation (ANEG) enable bit.
0
1
Reserved.
Isolate the PHY from the Ethernet interface. In this state, a
high impedance is applied to all Ethernet pins except
MDIO and MDC.
0
1
Restart the automatic negotiation (ANEG) procedure.
0
1
Set duplex mode.
0
1
Enable or disable collision test.
0
1
Reserved.
Enable or disable the effect of the
SMI registers.
0
1
Disable echo loop back.
Enable echo loop back.
10 Mbit/s
100 Mbit/s
Disable ANEG procedure.
Enable ANEG procedure.
No isolation. IC responds to normal management.
Isolate PHY.
Do not start ANEG.
Restart ANEG.
Half duplex mode.
Full duplex mode.
Collision test disabled.
Collision test enabled.
Effect of
Effect of
147
RESET
RESET
bit disabled.
bit enabled.
RESET
Rev. 1.1, 2005-01-30
bit (bit 15) on
VDSL6100i
PEF 22827
Interfaces