PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 143

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 46 SMI Signals in MAC Interface Mode
Signal
MDCO
MDIO
Table 47
Signal
MDCI
MDIO
9.2.3.1
The structure of the Serial Management Interface (SMI) frames is shown in
.
Table 48 MII Management Serial Interface Frame Structure
Preamble SFD OP
1…1
Serial Management Interface frames contain the following fields (see also
Preliminary Data Sheet
SMI Frame Structure
Direction Function
OUT
IN/OUT
Direction Function
IN
IN/OUT
01
SMI Signals in PHY Interface Mode
10 = read
01 = write
MII Serial Management Data Clock generated digital
transceiver when it is configured as a MAC device.
•
•
•
MII Serial Management Data Input/Output
•
•
•
MII Serial Management Data Clock - Generated by the MAC
device.
•
•
•
MII Serial Management Data Input/Output
•
•
•
This signal is not synchronized with other network interface
clocks.
Minimum MDC high/low values is 160 ns.
Minimum MDC period is 400 ns.
Bidirectional, tristate signal
Requires an external pull-up resistor
Synchronized with the MDC signal
This signal does not have to be synchronized with RX_CLK
or TX_CLK.
Minimum MDCI high/low values is 160 ns.
Minimum MDCI period is 400 ns.
Bidirectional, tristate signal.
Requires an external pull-up resistor.
Synchronized with the MDC signal.
PHY
Address
AAAAA
143
Register
Address
RRRRR
Turnaround Data
TT
Rev. 1.1, 2005-01-30
DDDD
DDDD
DDDD
DDDD
VDSL6100i
Table
PEF 22827
Table
Interfaces
Idle
Z
48):
48.