PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 166

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PEF22827EL-V11

Manufacturer Part Number
PEF22827EL-V11
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22827EL-V11

Lead Free Status / RoHS Status
Supplier Unconfirmed
Figure 36
between the PHY and the MAC, with the corresponding SMII signal and the direction for
each. It also shows the external 125 MHz source clock required for correct operation that
must be connected to the REFCLK signal on pin ECLK1 (pin P12).
For mapping for these pins and signals, see
Mode Pins" on Page 53
PHY Modes" on Page
the AC characteristics of these signals.
Figure 36
9.3.2.6
A digital transceiver that is configured as a PHY with a source synchronous Serial Media
Independent Interface (SMII) to interface to a MAC provides an MII interface that uses a
1-byte wide data bus and eight signals, including clock and Serial Management Interface
signals. Only PHY connection with this interface is supported.
This source synchronous SMII interface is compatible with that described in reference
[10]. For detailed functional descriptions of the source synchronous SMII signals, see
that document.
The block diagram when the digital transceiver is configured as a PHY and uses source
synchronous SMII to interface to a MAC is the same as for MII, as shown in
Block Diagram of PHY Configuration with MII Interface to a MAC, on page
Source synchronous SMII signals differ from MII signals in the use of the TXD and RXD
buses. In source synchronous SMII, only the LSB (bit 0) of each bus is used. The
remaining bits that are used in the MII interface, are ignored in the source synchronous
SMII interface.
Preliminary Data Sheet
shows the names of the pins (in parentheses) used for a typical SMII interface
Source Synchronous SMII Interface
VDSL Digital
Transceiver
Signals for a Typical SMII Interface
PHY
as a
54.
and
“Serial MII Interface, Typical Mode” on Page 275
Table 20 "Serial Management Interface (SMI) Pins for
166
TXSYNC
Table 18 "Source Synchronous SMII
MDCI
MDIO
RX
REFCLK
TX
125 MHz
Rev. 1.1, 2005-01-30
IEEE 802.3
Compatible
Ethernet
MAC
SMII_signals_PHY
VDSL6100i
PEF 22827
Interfaces
Figure 32,
specifies
162.

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