PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 33

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PEF22827EL-V11

Manufacturer Part Number
PEF22827EL-V11
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22827EL-V11

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 1
Pin or
Ball No.
K10
K11
K12
K13
K14
K15
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
Preliminary Data Sheet
Name
UTITXA4
UTITXA3
UTITXA2
UTITXA0
EOC_REN
UTITXA1
RXB_N
RXA_N
TMS_A
VDDPLL
CLK_MODE
VDDD
Int
Int
ETHOD0
TXD0
RXD0
RX
VDD_33
I/O Signals (page 9 of 15)
Pin
Type
I
I
I
I
O
I
AI
AI
AI
PWR
AI
PWR
-
-
O
O
O
O
PWR
Buffer
Type
-
-
-
-
PD
-
-
-
-
-
-
-
-
-
-
-
-
-
-
4)
33
Function
Network Interface Input Data
Network Interface Input Data
Network Interface Input Data
Network Interface Input Data
Configuration, Control and Status
Clear channel reception enable.
Configuration input signal during reset.
Network Interface Input Data
Negative Reception Analog Input B
Differential signal.
Negative Reception Analog Input A
Differential signal.
Analog JTAG Input Control
Tied to 0 in normal mode. For testing only)
Analog Supply for PLL
Analog block, 1.8 V supply
Analog Clock Source for Signals
Internal via XTAL or external via CLK_IN
Supply Digital Core
Analog block, 1.8 V supply
Internal Use Only
Do not connect.
Internal Use Only
Do not connect.
Ethernet Network Interface Output Data
Configuration pin during reset.
Ethernet Interface MII MAC - TX Data
Ethernet Interface MII and RMII PHY -
RX Data
Typical and Source Synchronous SMII -
Reception Data
Supply Digital I/O
Analog block, 3.3 V supply
Pin and Signal Descriptions
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827
1)
1)

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