PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 255

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PEF22827EL-V11

Manufacturer Part Number
PEF22827EL-V11
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22827EL-V11

Lead Free Status / RoHS Status
Supplier Unconfirmed
11
This section describes the registers that are dedicated to analog operations. It includes
a list of the registers with their offset addresses and detailed descriptions of each.
11.1
Table 81
for internal use only. Do not change the default values at these addresses.
Table 81
Register Short Name Register Long Name
ADC
DAC
PREFI_POFI
ACE_MBUF_AGC
POCO
AGC
ALOOP_BIAS
DCXO
FC_TUNE
WAK_PLL_TUN_RF
XTAL_TUN_PAR
PLL_PAR
GPO_PADS
11.2
This section describes the registers of the Analog Block in detail.
Note: Do not change the value of reserved bits and fields named Res0 or Res.
11.2.1
The
Preliminary Data Sheet
ADC
lists the registers of the analog block. Offset addresses not used are reserved
register sets ADC operation parameters.
Memory and Register Descriptions – Analog Block
Register Overview – Analog Block
Detailed Register Descriptions – Analog Block
ADC Operation Parameters
Analog Registers Overview
ADC Operation Parameters
DAC Control
PREFI and POFI Power Down
ACE, Measurement Buffer and AGC Mode
Power Control
Value for AGC Gain Calculation
Analog Loop and Bias Control
Digital Crystal Frequency
Corner Frequency and Tuning
Wake-up, PLL, Tuning and RFS Status
Clock, Test, Crystal and Tuning Parameters
PLL Parameters
General Purpose Output Pad Parameters
Memory and Register Descriptions – Analog Block
255
Rev. 1.1, 2005-01-30
Offset
Address
00
02
03
04
05
06
07
08
0C
0D
0F
12
19
VDSL6100i
PEF 22827
H
H
H
H
H
H
H
H
H
H
H
H
H

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