PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 256

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ADC
ADC Operation Parameters
Field
Res
ADC_CLK_IN
V
PD_ADC
11.2.2
The
DAC
DAC Control
Field
Res
DAC_CLK_IN
V
Preliminary Data Sheet
DAC
7
7
rw
register sets DAC operation parameters.
DAC Control
rw
6
6
Bits Type Description
7:2
1
0
Bits Type Description
7:2
1
rw
rw
rw
rw
rw
5
5
Reserved
Always 001010
Control ADC Clock Signal
0
1
Control ADC Power Down
0
1
Reserved
Always 0.
Control DAC Clock Signal
0
1
B
B
B
B
B
B
Res
Res
Memory and Register Descriptions – Analog Block
Normal operation.
Invert clock signal for ADC.
Normal operation.
Power down ADC.
Normal operation (Default).
Invert DAC clock.
4
4
(00
(02
256
rw
B
H
H
.
)
)
rw
3
3
2
2
ADC_CLK
DAC_CLK
Rev. 1.1, 2005-01-30
_INV
_INV
Reset Value: 28
Reset Value: 00
rw
rw
1
1
VDSL6100i
PEF 22827
PD_ADC
PD_DAC
rw
rw
0
0
H
H