PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 27

no-image

PEF22827EL-V11

Manufacturer Part Number
PEF22827EL-V11
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF22827EL-V11

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 1
Pin or
Ball No.
C14
C15
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
Preliminary Data Sheet
Name
I
VDD_PLL_12 PWR
GPO_A5
GPO_A1
Int
Int
OUT1
INN1
INP1
VSMINUS
PD3
PD5
POE
PA2
PA1
URTTX
EOC_TEN
2
CCLK
I/O Signals (page 3 of 15)
Pin
Type
I/O
AO
AO
-
-
AO
AI
AI
PWR
I/O
I/O
I
I
I
O
O
Buffer
Type
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
27
Function
I
EEPROM clock signal
Analog Supply for PLL
Digital block, 1.2 V supply
General Purpose Output
General Purpose Output
Internal
Do not connect.
Internal
Do not connect.
Output from Amplifier 1
Line Driver
Negative Input to Amplifier 1
Positive Input to Amplifier 1
Line Driver
Negative Supply Voltage
Parallel Data Bus
Host interface data bus.
Parallel Data Bus
Host interface data bus.
Parallel Output Enable
Output enable strobe to host interface.
Parallel Address Bus
Part of asynchronous address that selects
host interface registers.
Parallel Address Bus
Part of asynchronous address that selects
host interface registers.
UART Transmit Line
Configuration, Control and Status
Enables clear channel TX.
Configuration input signal during reset.
2
5 V of Line Driver
C Clock
Pin and Signal Descriptions
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827
1)

Related parts for PEF22827EL-V11