PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 40

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

2.3.1
Table 2
Table 2
Pin or
Ball No.
K4
L5
P4
P1
C13
F14
R2
E15
R3
P3
1)
Preliminary Data Sheet
See the reference design document for the external capacitor connection.
Lists all general purpose pins.
General Purpose Pins
Name
CLK_IN
CLK_MODE
CLKOUT
HRST_A
HRST_D
RSTO
WAKE-UP_A AO
WAKEUP_D I
XTAL1
XTAL2
General Purpose Signals
Pin
Type
I
AI
O
AI
I
O
AI
AO
Buffer
type
-
-
-
-
-
-
-
-
-
-
40
Function
External Clock Input for Analog Signals
Analog Clock Source for Signals
Internal via XTAL or external via CLK_IN.
Clock Output
Reference clock for parallel port and
internal use. Provides clock to the host.
Termination point must be active.
Analog Hard Reset Input
Digital Hard Reset
Hard reset pin. Activated on transition from
low to high. Activate on power up.
Digital Hard Reset
Active on low signal.
RSTO is used to sample the reset
configuration word.
Analog Wake-up Detection Interrupt
For analog signals. Connect to
WAKEUP_D.
Wake-up Interrupt Request
WAKEUP_D wakes the digital transceiver
from sleep mode. Also Loss-of-Power
indicator for far-end indication. Connect to
Wake-up_A.
Crystal
When CLK_MODE (L5) = 1,
0
1
Crystal
When CLK_MODE (L5) =1, not connected.
No divider
CLK_IN divided by 2
1)
1)
Pin and Signal Descriptions
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827