PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 168

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 38
Table 51 EOC Signals
Signal
EOC_TDATA
EOC_RDATA
EOC_TCLK
EOC_RCLK
EOC_TEN
EOC_REN
1)
Preliminary Data Sheet
The maximum clock frequency of the EOC_TCLK and EOC_RCLK signals is CLKIN/4. For example, a 38 MHz
clock is equal to 9 MHz.
EOC Interface Signals
I/O
I
O
I
I
O
O
EOC_RDATA
EOC_TDATA
EOC_RCLK
EOC_TCLK
EOC_REN
EOC_TEN
Reception clock
Asserted when OPCODE = IDLE
Description
Data In (two bytes per frame)
Data Out (two bytes per frame);
valid while EOC_REN is asserted
Transmission clock
and the VDSL is able to receive
the next bit
Asserted when OPCODE = IDLE
and the VDSL is able to transmit
the next bit
168
VDSL Digital
Transceiver
Timing
Sample on EOC_TCLK
falling edge
Driven on EOC_RCLK
rising edge
Driven on EOC_TCLK
rising edge
Driven on EOC_RCLK
rising edge
1)
Rev. 1.1, 2005-01-30
EOC_sig
VDSL6100i
PEF 22827
Interfaces