PEF22827EL-V11 Lantiq, PEF22827EL-V11 Datasheet - Page 167

• Manufacturer Part Number: PEF22827EL-V11
• Manufacturer: Lantiq

Specifications of PEF22827EL-V11

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 37
synchronous SMII interface between the PHY and the MAC, with the corresponding
source synchronous SMII signal and the direction for each. It also shows the external
125 MHz source clock required for correct operation that must be connected to the
ECLK1 pin (RXCLKREF signal).
For mapping for these pins and signals, see
Mode Pins" on Page 53
PHY Modes" on Page
the AC characteristics of these signals.
Figure 37
9.4
Figure 38
describes them and
Pins" on Page
Preliminary Data Sheet
shows a block diagram of the signals used for the EOC interface,
VDSL Digital
EOC Interface
shows the names of the pins (in parentheses) used for the source
Transceiver
Signals for a Source Synchronous SMII Interface
PHY
as a
42.
Figure 39
54.
and
“Serial MII Interface, Typical Mode” on Page 275
Table 20 "Serial Management Interface (SMI) Pins for
shows their timing. See also,
RXCLKREF
RXSYNC
TXSYNC
RXCLK
TXCLK
MDIO
MDCI
RX
TX
167
125 MHz
Table 18 "Source Synchronous SMII
IEEE 802.3
Compatible
Table 4 "EOC and PCM
Ethernet
MAC
SMII_signals_PHY_SS
Rev. 1.1, 2005-01-30
VDSL6100i
PEF 22827
Interfaces
Table 51
specifies