TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 7

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
D0 to D7
P10 to P17
D8 to D15
P40 to P47
A0 to A7
P50 to P57
A8 to A15
P60 to P67
A16 to A23
P70
P71
P72
P73
P74
CLKOUT
P75
R/
P76
P80
P81
P82
P83
P90
SCK
P91
SO
SDA
P92
SI
SCL
PA0 to PA2,
PA7
Pin Names
RD
CS0
CS1
CS2
CS3
WRLL
WRLU
WAIT
2.2
W
Pin Names and Functions
The following tables show the names and functions of the input/output pins.
Number
of Pins
8
8
8
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Table 2.2.1 Pin Names and Functions (1/2)
Data (Lower): Data bus D0 to D7.
Port 1: I/O port that allows I/O to be selected at the bit level.
(when used to the external 8-bit bus.)
Data: Data bus D8 to D15.
Port 4: I/O port.
Address: Address bus A0 to A7.
Port 5: I/O port.
Address: Address bus A8 to A15.
Port 6: I/O port.
Address: Address bus A16 to A23.
Port 70: Output port.
Read: Strobe signal for reading external memory.
Port 71: Output port.
Write: Strobe signal for writing data to pins D0 to D7.
Port 72: Output port.
Write: Strobe signal for writing data to pins D8 to D15.
Port 73: Output port.
Port 74: Output port.
Clock: Output system clock.
Port 75: Output port.
Read/write: This port is 1 when read and dummy cycle. This port is 0 when write cycle.
Port 76: I/O port.
Wait: Pin used to request bus wait to CPU.
Port 80: Output port.
Chip select 0: Outputs 0 when address is within specified address area.
Port 81: Output port.
Chip select 1: Outputs 0 when address is within specified address area.
Port 82: Output port.
Chip select 2: Outputs 0 when address is within specified address area.
Port 83: Output port.
Chip select 3: Outputs 0 when address is within specified address area.
Port 90: I/O port.
Serial bus interface clock I/O data at SIO mode.
Port 91: I/O port.
Serial bus interface send data at SIO mode.
Serial bus interface send/receive data at I
(Open-drain output mode by programmable.)
Port 92: I/O port.
Serial bus interface receive data at SIO mode.
Serial bus interface clock I/O data at I
(Open-drain output mode by programmable.)
Port A0 to A2, A7: Input port (with pull-up resistor).
92CM22-5
2
C mode.
Functions
2
C mode.
TMP92CM22
2007-02-16

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