TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 114

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
Up counter
Comparator output
Up counter clear
(Match detect)
Comparator
<TA1RUN>
TA01RUN
TA01MOD
TA1REG
TA1FFCR
PCCR
PCFC
TA01RUN
X : Don’t care, − : No change
TA01RUN
Bit7 to 2
2.
TA1OUT
INTTA1
TA1FF
timing
Bit1
Bit0
φT1
Generating a 50% duty ratio square wave pulse
status output via the timer output pin (TA1OUT).
Example: To output a 2.4 μs square wave pulse from the TA1OUT pin at f
The state of the timer flip-flop (TA1FF1) is inverted at constant intervals and its
Figure 3.7.10 Square Wave Output Timing Chart (50% duty)
MSB
← −
← 0
← 0
← X
← X
← X
← −
0
7
use the following procedure to make the appropriate register settings. This
example uses TMRA1; however, either TMRA0 or TMRA1 may be used.
6
X
0
0
X
X
1
5
X
X
0
X
X
4
X
X
0
X
X
X
X
2
3
0
0
1
2
1
0
0
X
X
1
3
92CM22-112
1
0
1
1
1
1
1
LSB
0
0
1
1
1.2 μs at f
1
C
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and select φT1 (=(16/fc)s at f
40MHz) as the input clock.
Set the timer register to 2.4 μs ÷ φT1 ÷ 2 = 3.
Clear TA1FF to 0 and set it to invert on the match detect
signal from TMRA1.
Set PC1 to function as the TA1OUT pin.
Start TMRA1 counting.
2
= 40 MHz
3
0
1
2
3
TMP92CM22
0
C
2007-02-16
= 40 MHz,
C
=

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