TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 157

no-image

TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
SC1MOD0
(120AH)
Bit symbol
Read/Write
After reset
Function
Figure 3.9.8 Serial Mode Control Register (for SIO1 and SC1MOD)
Transfer
data bit8
TB8
7
0
Handshake
function
control
0: CTS
1: CTS
disable
enable
CTSE
6
0
Receive
control
1: Receive
0: Receive
disable
enable
RXE
92CM22-155
5
0
Wakeup
function
0: Disable
1: Enable
WU
4
0
R/W
Serial transmission
mode
00: I/O interface mode
01: 7-bit UART mode
10: 8-bit UART mode
11: 9-bit UART mode
SM1
Serial transmission clock source (UART)
Note: The clock selection for the I/O interface
Serial transmission mode
Wakeup function
Receiving function
Handshake function (
Transmission data bit8
3
0
00
01
10
11
00
01
10
11
0
1
0
1
0
1
TMRA0 trigger output signal
Baud rate generator
Internal clock f
External clock (SCLK1 input)
I/O interface mode
UART mode
9-bit UART
Interrupt generated when
data is received
Interrupt generated only
when SC1CR<RB8> = 1
Receive disabled
Receive enabled
Disabled (Always transferable)
Enabled
mode is controlled by the serial control
register (SC1CR).
SM0
2
0
IO
CTS
Serial transmission clock
(UART)
00: Timer A0 trigger
01: Baud rate generator
10: Internal clock f
11: External clcok
7-bit mode
8-bit mode
9-bit mode
(SCLK1 input)
SC1
pin)
1
0
TMP92CM22
2007-02-16
Other modes
Don’t care
SC0
IO
0
0

Related parts for TMP92xy22FG