TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 203

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

ADMOD2
(12BAH)
ADMOD1
(12B9H)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note:
As pin AN3 also functions as the
using
0: OFF
1: ON
VREF
application
control
VREFON
7
ADTRG
7
0
with <ADTRGE> set to “1”.
0: Stop
1: Operate
Figure 3.11.3 Register for AD Converter
IDLE2
I2AD
6
6
0
AD Mode Control Register 1
AD Mode Control Register 2
Always
write “0”.
92CM22-201
ADTRG
5
5
−
0
<ADCH2:0>
input pin, do not set <ADCH2:0> = “011, 100,101,110,111” when
000
001
010
011 (Note)
100 (Note)
101 (Note)
110 (Note)
111 (Note)
Always write
“0”.
4
4
−
0
<SCAN>
R/W
Always
write “0”.
3
3
−
0
Analog input channel selection
Channel
Before starting conversion (before writing 1
to ADMOD0<ADS>), set the <VREFON> bit
to 1.
IDLE2 control
Control of application of reference voltage
to AD converter
AD conversion start control by external
trigger (
fixed
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
0
1
0
1
0
1
0
ADCH2
Stopped
In operation
OFF
ON
Disabled
Enabled
Analog input channel selection
2
ADTRG
2
0
AN0
AN0 → AN1
AN0 → AN1 → AN2
AN0 → AN1 → AN2 → AN3
AN0 → AN1 → AN2 → AN3
→ AN4
AN0 → AN1 → AN2 → AN3
→ AN4 → AN5
AN0 → AN1 → AN2 → AN3
→ AN4 → AN5 → AN6
AN0 → AN1 → AN2 → AN3
→ AN4 → AN5 → AN6 → AN7
input )
ADCH1
1
1
0
Channel
scanned
TMP92CM22
1
2007-02-16
0: Disable
1. Enable
AD conversion
trigger start
control
ADTRGE
ADCH0
R/W
0
0
0
0