TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 113

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.7.4
Note: The input clocks for TMRA0 and TMRA1 differ as follows:
TA01RUN
TA01MOD
TA1REG
INTETA01
TA01RUN
X : Don’t care, − : No change
Operation in Each Mode
(1) 8-bit timer mode
1.
Table 3.7.3 Selecting Interrupt Interval and the Input Clock Using 8-Bit Timer
Select the input clock refers to Table 3.7.3.
φT256 (2048/f
Generating interrupts at a fixed interval (using TMRA1)
TMRA1 then set the operation mode, input clock and a cycle to TA01MOD and
TA1REG register, respectively. Then, enable the interrupt INTTA1 and start TMRA1
counting.
φT16 (128/f
Example: To generate an INTTA1 interrupt every 40 μs at f
φT4 (32/f
TMRA0: Uses TMRA0 input (TA0IN) and can be selected from φT1, φT4, or φT16.
TMRA1: Matches output of TMRA0 (TA0TRG) and can be selected from φT1, φT16,
Input clock
φT1 (8/f
Both TMRA0 and TMRA1 can be used independently as 8-bit interval timers.
When set function and count data, TMRA0 and TMRA1 should be stopped.
To generate interrupts at constant intervals using TMRA1 (INTTA1), first stop
MSB
← −
← 0
← 0
← X
← −
SYS
SYS
SYS
7
SYS
φT256.
)
as follows:
)
)
6
X
0
1
1
X
)
5
X
X
1
0
X
4
X
X
0
1
X
Interrupt Interval (at f
3
−
0
0
−
−
2
−
1
1
−
1
92CM22-111
1
0
−
0
−
1
LSB
102.4 μs to 26.21 ms
0
−
−
0
−
−
6.4 μs to 1.638 ms
0.4 μs to 102.4 μs
1.6 μs to 409.6 μs
Stop TMRA1 and clear it to 0.
Select 8-bit timer mode and select φT1 (=(16/fc)s at f
40MHz) as the input clock.
Set 40 μs ÷ φT1 = 100 = 64H to TAREG.
Enable INTTA1 and set it to Level 5.
Start TMRA1 counting.
SYS
= 20 MHz)
C
= 40 MHz, set each register
Resolution
102.4 μs
0.4 μs
1.6 μs
6.4 μs
TMP92CM22
2007-02-16
C
=