TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 133

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

Read-modify
-write
instruction is
prohibited
TB1FFCR
(1193H)
Bit symbol
Read/Write
After reset
Function
TB1FF1 control
00: Invert
01: Set
10: Clear
11: Don’t care
* Always read as “11”.
TB1FF1C1
7
1
W*
TB1FF1C0
6
1
TMRB1 Flip-flop Control Register
Figure 3.8.7 Register for TMRB
TB1FF0 inversion trigger
0: Trigger disable
1: Trigger enable
Invert when
the UC12
value is
loaded into
TB1CP1H/L.
TB1C1T1
92CM22-131
5
0
Invert when
the UC12
value is
loaded into
TB1CP0H/L.
TB1C0T1
4
0
R/W
Timer flip-flop TB1 (TB1FF0) control
Inverted when the UC12 value matches the value in
TB1RG0H/L
Inverted when the UC12 value matches the value in
TB1RG1H/L
Inverted when the UC12 value is loaded into
TB1CP0H/L
I Inverted when the UC12 value is loaded into
TB1CP1H/L
TB1FF1 control
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
Invert when
the UC12
matches with
TB1RG1H/L.
TB1E1T1
Invert
Set to “1”.
Set to “0”.
Don’t care
Disable inversion
Enable inversion
Disable inversion
Enable inversion
Disable inversion
Enable inversion
Disable inversion
Enable inversion
Invert value of TB1FF1
Set TB1FF1 to “1”.
Set TB1FF1 to “0”.
Don’t care
3
0
Invert when
the UC12
match with
TB1RG0H/L.
TB1E0T1
2
0
TB1FF0 control
00: Invert
01: Set
10: Clear
11: Don’t care
* Always read as “11”.
TB1FFC1
1
1
TMP92CM22
2007-02-16
W*
TB1FFC0
0
1