TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 145

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

SCLK0 input
(Shared
SCLK0 output
(Shared
RXD0
(Shared
with PF2)
with PF2)
with PF1)
3.9.1
φT0
f
io
SC0MOD0
Block Diagram
<RXE>
φT0
φT2
φT8
φT32
RXDCLK
Serial clock generation circuit
I/O interface mode
RB8
BR0CR<BR0CK1:0>
2
Receive buffer 1 (Shift register)
φT2
(UART only ÷ 16)
Receive counter
Receive control
4 8 16 32
Prescaler
Receive buffer 2 (SC0BUF)
Baud rate generater
φT8
<BR0S3:0>
BR0CR
φT32
<BR0ADDE>
64
BR0CR
SC0MOD0
Figure 3.9.2 Block Diagram of SIO0
<WU>
<BR0K3:0>
BR0ADD
<OERR> <PERR> <FERR>
92CM22-143
÷ 2
<PE>
interrupt control
Serial channel
Internal data bus
Parity control
(from TMRA0)
Error flag
SC0CR
SC0CR
SC0MOD0
<SC1:0>
SC0CR
<IOC>
<EVEN>
TA0TRG
I/O interface mode
UART
mode
SC0MOD0
<SM1:0>
TXDCLK
TB8
(UART only ÷ 16)
Transsmission
Transmission
Transmission buffer
SIOCLK
counter
control
(SC0BUF)
SC0MOD0
<CTSE>
TMP92CM22
2007-02-16
(Shared with PF2)
CTS0
TXD0
(Shared with PF0)
Interrupt
INTRX0
INTTX0