TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 64

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
(0023H)
(0020H)
P8FC
P8
3.5.6
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Note 1: Read-modify-write instruction is prohibited for the registers P8FC.
Note 2: When set P82 pin as
Port 8 (P80 to P83)
latches of P80, P81, and P83 to “1”.
signal (
In addition to functioning as a output port, port 8 can also function as a output chip select
These settings operate by programming “1” to the corresponding bit of P8FC.
Resetting set all bits of P8FC to “0”, these pits set output mode.
Port 8 is 4-bit output port. Resetting sets output latch of P82 to “0” and set output
P82 to “0” (P8<P82> = 0).
If set function register (P8FC<P82F> = 1) after set output latch to “1” (P8<P82> = 1), maybe operation become
to error because
Reset
CS0
7
7
to
Function control
P8 read
(on bit basis)
Output latch
CS3
P8FC write
P8 write
CS
).
2
6
6
output don’t output correctly.
CS
Figure 3.5.13 Register for Port 8
2
after release reset, set function register (P8FC<P82F> = 1) in keep output latch of
CS0
Port 8 Function Register
Figure 3.5.12 Port 8
5
5
,
CS1
Port 8 Register
92CM22-62
,
CS2
A
B
Selector
,
4
4
S
CS3
0: Port
1:
P83F
CS
P83
3
3
1
0
3
0: Port
1:
P82F
CS
P82
2
2
0
0
2
P80 (
P81 (
P82 (
P83 (
R/W
W
0: Port
1:
CS0
CS1
CS2
CS3
P81F
CS
P81
1
1
1
0
1
)
)
)
)
0: Port
1:
P80F
TMP92CM22
CS
P80
0
0
1
0
2007-02-16
0

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