TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 201

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

AN3/
3.11 Analog/Digital Converter
ADTRG
AN7 (PG7)
AN6 (PG6)
AN5 (PG5)
AN4 (PG4)
AN2 (PG2)
AN1 (PG1)
AN0 (PG0)
converter (AD converter) with 8-channel analog input.
AN7) are shared with the input-only port G so they can be used as an input port.
Note: When IDLE2, IDLE1, or STOP mode is selected, as to reduce the power, with some timings
VREFH
VREFL
The TMP92CM22 incorporates a 10-bit successive approximation-type analog/digital
Figure 3.11.1 is a block diagram of the AD converter. The 8-channel analog input pins (AN0 to
(PG3)
the system may enter a standby mode even though the internal comparator is still enabled.
Therefore be sure to check that AD converter operations are halted before a HALT
instruction is executed.
Channel selection
AD mode control register 1
ADMOD1
<ADCH2:0>
control circuit
Internal data bus
Figure 3.11.1 Block Diagram of AD Converter
<ADTRGE>
<VREFON>
92CM22-199
<EOCF><ADBF><ITM0><REPEAT><SCAN><ADS>
Sample
hold
End
AD mode control register 0 ADMOD0
Busy
Internal data bus
Interrupt
Comparater
DA converter
control circuit
AD converter
Repeat
Scan
ADREG0H to ADREG7H
ADREG0L to ADREG7L
AD conversion result
Start
Interrupt
request
INTAD
register
ADTRG
Internal data bus
TMP92CM22
2007-02-16