TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 19

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.3.4
<PLLON>
<FCSEL>
PLL output: f
Lockup timer
<LWUPFG>
System clock f
Clock Doubler (PLL)
PLL to stop status, setting to PLLCR register is needed before use.
PLL
PLL outputs the f
Like an oscillator, this circuit requires time to stabilize. This is called the lockup time.
Note 1: Input frequency limitation for PLL
Note 2: PLLCR<LWUPFG>
The following is a setting example for PLL starting and PLL stopping.
SYS
Example 1: PLL starting
PLLCR
LUP:
X: Don’t care
The limitation of input frequency (High-frequency oscillation) for PLL is the following.
f
The logic of PLLCR<LUPFG> is different from 900/L1’s DFM.
Be careful to judge an end of lockup time.
OSCH
Starts PLL operation and
starts lockup.
= 4 to 10 MHz (Vcc = 3.0 V to 3.6 V)
EQU
LD
BIT
JR
LD
PLL
clock signal, which is four times as fast as f
10E8H
5, (PLLCR)
Z, LUP
(PLLCR), 10XXXXXXXB
(PLLCR), 11XXXXXXB
Count-up by f
During lockup
92CM22-17
OSCH
;
;
;
;
Ends of lockup
Enables PLL operation and starts lockup.
Detects end of lockup.
Changes fc from 10 MHz to 40 MHz.
Changes from 10 MHz to 40 MHz.
After lockup
OSCH
. A reset initializes
TMP92CM22
2007-02-16