TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 104

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.7.2
<GEAR2:0>
Clock gear
100 (1/16)
selection
SYSCR1
000 (1/1)
001 (1/2)
010 (1/4)
011 (1/8)
Operation of Each Circuit
(1) Prescaler
(2) Up counters (UC0 and UC1)
timer control register. Setting <TA0PRUN> to “1” starts the count; setting
<TA0PRUN> to “0” clears the prescaler to “0” and stops operation. Table 3.7.2 shows
the various prescaler output clock resolutions.
specified by TA01MOD.
The input clock for UC0 is selectable and can be either the external clock input via the
TA0IN pin or one of the three internal clocks φT1, φT4, or φT16. The clock setting is
specified by the value set in TA01MOD<TA01CLK1:0>.
overflow output from UC0 is used as the input clock. In any mode other than 16-bit
timer mode, the input clock is selectable and can either be one of the internal clocks
φT1, φT16, or φT256, or the comparator output (The match detection signal) from
TMRA0.
TA01RUN<TA0RUN> and TA01RUN<TA1RUN> can be used to stop and clear the up
counters and to control their count. A reset release both up counters, stopping the
timers.
A 9-bit prescaler generates the input clock to TMRA01.
The prescaler’s operation can be controlled using TA01RUN<TA0PRUN> in the
These are 8-bit binary counters which count up the input clock pulses for the clock
The input clock for UC1 depends on the operation mode. In 16-bit timer mode, the
For
System clock
<SYSCK>
SYSCR1
selection
0 (fc)
each
Table 3.7.2 Prescaler Output Clock Resolution
interval
1/8
−
φT1(1/2)
timer
92CM22-102
fc/128
fc/256
fc/16
fc/32
fc/64
the
Timer counter input clock
TAxMOD<TAxCLK1:0>
φT4(1/8)
timer
fc/1024
fc/128
fc/256
fc/512
fc/64
TMRA prescaler
operation
φT16(1/32) φT256(1/512)
fc/1024
fc/2048
fc/4096
fc/256
fc/512
control
fc/16384
fc/32768
fc/65536
fc/4096
fc/8192
register
TMP92CM22
2007-02-16
bits