TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 170

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
Main routine
PFCR
PFFC
INTES0
SC0MOD0
SC0BUF
Interrupt routine (INTTX0)
SC0MOD0
SC0BUF
Main routine
PFCR
PFFC
INTES0
SC0MOD0 ← 0 0 1 1 1 1 1 0
Interrupt routine (INTRX0)
Acc ← SC0BUF
if Acc = Select code
Then
SC0MOD0
Example: To link two slave controllers serially with the master controller using the system
TXD
← 1 1 0 1 1 1 1 0
← − − − 0 − − − −
← − − − − − − 0 0
← − − − − − − X 1
← 1 1 0 0 1 1 0 1
← 1 0 1 0 1 1 1 0
← 0 0 0 0 0 0 0 1
← 0 − − − − − − −
← ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
← − − − − − − 0 1
← − − − − − − X 1
Master
Master controller setting
Slave setting
clock f
RXD
IO
as the transfer clock.
TXD
Select code
92CM22-168
00000001
Slave 1
RXD
Set INTTX0 to enable, and set interrupt level to level 4.
Set INTRX0 to enable, and set interrupt level to level 5.
Set to 9-bit UART mode, and set transfer clock to f
Set TB8 to “0”.
Set INTTX0 and INTRX0 to enable.
Set to <WU> = “1” in 9-bit UART mode transfer clock f
Clear to <WU> = “0”.
Set PF0 to TXD0, and set PF1 to RXD0 pin.
Set select code of slave 1.
Set transmission data.
Set PF0 to TXD (open-drain output), and PC1 to RXD.
TXD
Select code
00001010
Slave 2
RXD
TMP92CM22
2007-02-16
IO.
IO.

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