TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 56

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.5.2
*: When these ports are used as general-purpose I/O port, each bit can be set individually for input or output. However, each
bit cannot be set individually for input or output even if 1bit or more bits are used as address bus in same port.
All of general-purpose I/O ports except for port that used as address bus are operated as output port.
Please be careful when using this setting.
Port 4 (P40 to P47)
or outputs by control register P4CR and function register P4FC*.
address bus (A0 to A7).
and AM0 pins.
Port 4 is an 8-bit general-purpose I/O port*. Bits can be individually set as either inputs
In addition to functioning as a general-purpose I/O port, port 4 can also function as a
After released reset, device set Port 4 to pins of follow function by combination of AM1
Reset
Direction control
Function control
(on bit basis)*
AM1
(on bit basis)
Output latch
P4CR write
P4FC write
0
0
1
1
P4 write
AM0
0
1
0
1
Figure 3.5.3 Port 4
P4 read
Internal address bus
92CM22-54
Function Setting after Reset
B
A
Selector
A0 to A7
Address bus (A0 to A7)
Address bus (A0 to A7)
Don’t use this setting
Don’t use this setting
S
Output buffer
Port 4
P40 to P47
(A0 to A7)
TMP92CM22
2007-02-16