TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 51

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.5
Names
Port C
Port D
Port G
Port 1
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port F
Port
*: When these ports are used as general-purpose I/O port, each bit can be set individually for input or
Port Function
relate to the built-in CPU and internal I/Os. Table 3.5.1 lists the functions of each port pin.
output. However, each bit cannot be set individually for input or output even if 1bit or more bits are
used as address bus in same port.
All of general-purpose I/O ports except for port that used as address bus are operated as output
port.
Please be careful when using this setting.
The TMP92CM22 features 50-bit settings which relate to the various I/O ports.
As well as general-purpose I/O port functionality, the port pins also have I/O functions which
Table 3.5.2 and Table 3.5.3 lists I/O registers and their specifications.
P10 to P17
P40 to P47
P50 to P57
P60 to P67
P70
P71
P72
P73
P74
P75
P76
P80
P81
P82
P83
P90
P91
P92
PA0
PA1
PA2
PA7
PC0
PC1
PC3
PC5
PC6
PD0
PD1
PD2
PD3
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
Pin Names
Table 3.5.1 Port Function (R: U = with pull-up resistor)
Number
of Pins
8
8
8
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O*
I/O*
I/O*
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
92CM22-49
R
U
U
U
U
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Setting Unit
Direction
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
(Fixed)
Bit*
Bit*
Bit*
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
D8 to D15
A0 to A7
A8 to A15
A16 to A23
CLKOUT
R/
SCK
SO, SDA
SI, SCL
TA0IN
INT1, TA1OUT
INT0
INT2, TA3OUT
INT3, TB0OUT0
INT4, TB1IN0
INT5, TB1IN1
TB1OUT0
TB1OUT1
TXD0
RXD0
SCLK0,
TXD1
RXD1
SCLK1,
AN0
AN1
AN2
AN3,
AN4
AN5
AN6
AN7
RD
CS0
CS1
CS2
CS3
WRLL
WRLU
WAIT
Pin Names for Built-In
W
ADTRG
CTS0
CTS1
Function
TMP92CM22
2007-02-16