TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 62

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

3.5.5
Port 7 (P70 to P76)
function register P7FC.
function as output pin of read/write strobe signals to connect with an external memory. P74
pin can also function as CLKOUT output pin when outputted internal clock. P76 pin can
also function as wait input.
mode.
Port 7 is a 7-bit general-purpose I/O port (P70 to P75 are used for output only).
Bits can be individually set as either inputs or outputs by control register P7CR and
In addition to functioning as a general-purpose I/O port, P70 to P73 pins can also
After reset, P71 to P75 pins are set to output port mode, and P76 pin is set to input port
P70 pin set port 1 to pins of follow function by combination of AM1 and AM0 pins.
Reset
Function control
P7 read
AM1
(on bit basis)
Output latch
P7FC write
0
0
1
1
P7 write
Figure 3.5.9 Port 7 (P70 to P75)
AM0
0
1
0
1
CLKOUT, R/
Note: P73 is fixed to VCC.
RD
,
WRLL
92CM22-60
Function Setting after Reset
,
A
B
W
WRLU
Selector
Don’t use this setting
CPU control pin (
CPU control pin (
Don’t use this setting
S
,
Output buffer
RD
RD
)
)
Port 7
P70 (
P71 (
P72 (
P73
P74 (CLKOUT)
P75 (R/
RD
WRLL
WRLU
W
)
)
)
)
TMP92CM22
2007-02-16