TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 149

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TMP92xy22FG

Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy22FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
Note: The N + (16 − K)/16 division function is disabled and setting BR0ADD<BR0K3:0>
Integer divider (N divider)
N + (16 − K)/16 divider (UART mode only)
frequency divider N (BR0CR<BR0S3:0>) = 8, and BR0CR<BR0ADDE> = 0, the
baud rate in UART mode is as follows:
frequency divider N (BR0CR<BR0S3:0>) = 6, K (BR0ADD<BR0K3:0>) = 8, and
BR0CR<BR0ADDE> = 1, the baud rate is as follows:
channels 0 and 1). The method for calculating the baud rate is explained below:
For example, when the f
∗ Clock state
Accordingly, when f
* Clock state
Table 3.9.3 show examples of UART mode transfer rates.
Additionally, the external clock input is available in the serial clock (Serial
Baud rate =
Baud rate =
is invalid.
In UART mode
In I/O interface mode
= 39.3216 × 10
= 31.9488 × 10
Baud rate = External clock input frequency ÷ 16
It is necessary to satisfy (External clock input cycle) ≥ 4/f
Baud rate = External clock input frequency
It is necessary to satisfy (External clock input cycle) ≥ 16/f
Clock gear:
Clock gear:
f
C
6
6 +
6
8
/32
÷ 16 ÷ 8 ÷ 16 = 9600 (bps)
÷ 32 ÷ (6 +
C
92CM22-147
f
(16 − 8)
C
1/1 (f
1/1 (f
= 31.9488 MHz, the input clock frequency = φT2, the
16
/32
C
÷
16
= 39.3216 MHz, the input clock frequency = φT2, the
C
C
)
)
16
8
÷ 16
) ÷ 16 = 9600 (bps)
SYS
SYS
TMP92CM22
2007-02-16

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