TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 39

• Manufacturer Part Number: TMP92xy22FG
• Manufacturer: Toshiba

Specifications of TMP92xy22FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 32
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: -
• Number Of I/o Ports: 50
• Power Supply Voltage(v): 3.0 to 3.6

DMAM [4:0]
0
Note 1: The execution state number shows number of best case (1-state memory access).
Note 2: “n” shows micro DMA channel number (0 to 7).
ZZ
111 00
000 zz
001 zz
010 zz
011 zz
100 zz
101 zz
110 zz
0
: 00 = 1-byte transfer
: 01 = 2-byte transfer
: 10 = 4-byte transfer
: 11 = (Reserved)
0
(4) Detailed description of the transfer mode register
1 state = 50 ns (at internal 20 MHz)
Destination address INC mode
Source address DEC mode
Source address INC mode
(DMADn)
Source address DEC mode
Source address INC mode
Source address DEC mode
Destination address fixed mode
Counter mode
(DMADn +) ← (DMASn)
DMACn
(DMADn −) ← (DMASn)
DMACn
DMACn
(DMADn)
DMACn
(DMADn +) ← (DMASn +)
DMACn
(DMADn −) ← (DMASn −)
DMACn
(DMADn) ← (DMASn)
DMACn
DMASn
DMACn
Mode
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
If DMACn = 0 then INTTC
← DMASn + 1
← DMACn − 1
← DMACn − 1
← DMACn − 1
← (DMASn +)
← DMACn − 1
← DMACn − 1
← DMACn − 1
← DMACn − 1
← (DMASn −)
← DMACn − 1
DMAM0 to DMAM7
Operation
92CM22-37
Execution Time
5 states
5 states
5 states
5 states
6 states
6 states
5 states
5 states
TMP92CM22
2007-02-16