TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 57
TMPM370FYFG
Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM370FYFG.pdf
(498 pages)
Specifications of TMPM370FYFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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(3)Preconfiguration 1 (Interrupt from external pin)
(4)Preconfiguration 2 (interrupt from peripheral function)
(5)Preconfiguration 3 (interrupt Set-Pending Register)
(6)Configuring the clock generator
Reset Control Register.
be used as the function pin. Setting PnIE[m] allows the pin to be used as the input port.
peripheral function for details.
corresponding bit of this register.
and enable interrupts in the CGIMCG register of the clock generator. The CGIMCG register is
capable of configuring each source.
avoid unexpected interrupt. To clear corresponding interrupt request, write a value corresponding
Set “1” to the port function register of the corresponding pin. Setting PnFRx[m] allows the pin to
The setting varies depending on the peripheral function to be used. See chapters of each
To generate an interrupt by using the Interrupt Set-Pending Register, set "1" to the
For an interrupt source to be used for exiting a standby mode, you need to set the active level
Before enabling an interrupt, clear the corresponding interrupt request already held. This can
You can assign grouping priority by using the PRIGROUP field in the Application Interrupt and
(Note)
(Note)
(Note)
●NVIC register
<PRI_n>
<PRIGROUP>
● Port register
PnFRx<PnmFRx>
PnIE<PnmIE>
● NVIC register
Interrupt Set-Pending[m]
n: port number / m: corresponding bit / x: function register number
In modes other than STOP mode, setting PxIE to enable input
enables the corresponding interrupt input regardless of the PnFR
setting. Be careful not to enable interrupts that are not used. Also,
be aware of the description of “Precautions when using external
interrpt pins”
m: corresponding bit
"n" indicates the corresponding exceptions/interrupts.
This product uses three bits for assigning a priority level.
←
←
←
←
“Priority”
“group priority” (This is configurable if required)
TMPM370 7-19
“1”
“1”
←
“1”
TMPM370
Interrupt
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