TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 365

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TMPM370FYFG

Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
17.6.4 Successive Conversion Using One PMD (One Shunt) and One ADC
ADC.
phases of a motor. AIN inputs are selected to obtain these phases. “R” indicates a resistor, where
the AIN that is connected to that resistor is set.
interrupt (INTADAPDA) is generated for a trigger from PMD0 and the interrupt (INTADAPDB) is
generated for a trigger from PMD1. In ADC B, interrupt generation is disabled in this example.
Program
PMD Trigger Program Registers ADAPSETn0 and ADAPSETn1. “R” indicates a resistor, where
the AIN input that is connected to that resistor is set.
program 1 is completed, the interrupt (INTADAPDA) is generated.
Trigger
When a trigger input occurs, ADC A or ADC B is started to perform AD conversion. In ADC A, the
The following shows a circuit diagram for AD conversion using one PMD for one shunt and one
Example ADC settings are shown below.
Programs 0 and 1 are assigned to two trigger signals from PMD0. “reg0” and “reg1” indicate the
When a trigger input occurs, the ADC is started to execute programs 0 and 1 sequentially. When
R
reg0
reg1
INT
AINA0
PMD0
R
0
0
-
-
ADC A
PMD0
R
A
1
1
-
PMD0TRGn
(n = 0, 1)
TMPM370 17-49
2
PMD 0
INTADAPDA
Analog/ Digital Converter
TMPM370

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