TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 397

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TMPM370FYFG

Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
20.2.2 User Boot Mode (Single chip mode)
The condition to switch the modes needs to be set by using the I/O of TMPM370 in conformity
User Boot mode is to use flash memory programming routine defined by users. It is used when
the data transfer buses for flash memory program code on the old application and for serial I/O
are different. It operates at the single chip mode; therefore, a switch from normal mode in which
user application is activated at the single chip mode to User Boot Mode for programming flash is
required. Specifically, add a mode judgment routine to a reset program in the old application.
with the user’s system setup condition. Also, flash memory programming routine that the user
uniquely makes up needs to be set in the new application. This routine is used for
programming after being switched to User Boot Mode. The execution of the programming
routine must take place while it is stored in the area other than the flash memory since the
data in the internal flash memory cannot be read out during delete/ writing mode. Once
re-programming is complete, it is recommended to protect relevant flash blocks from
accidental corruption during subsequent Single-Chip (Normal mode) operations. All the
interruption including a non-maskable are inhibited at User Boot Mode.
(1-A) and (1-B) are the examples of programming with routines in the internal flash memory
and in the external memory. For a detailed description of the erase and program sequence,
refer to 19.3 On-board Programming of Flash Memory (Rewrite/Erase).
TMPM370 20-5
Flash Memory Operation
TMPM370

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