TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 364

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

17.6.3 Successive Conversion Using PMD A (Three Shunts), PMD B (One Shunt)
PMD for one shunt and two ADCs.
ADC A
ADC B
are assigned to two trigger signals from PMD1. In ADC B, programs 0 to 2 are assigned to six
trigger signals from PMD0. “reg0”, “reg1” and “reg2” indicate the PMD Trigger Program Registers
ADxPSETn0, ADxPSETn1 and ADxPSETn2 (x=A,B : ADC Unit). “U”, “V” and “W” indicate the
Program
Program
Trigger
Trigger
The following shows a circuit diagram for AD conversion using one PMD for three shunts, one
Example ADC settings are shown below.
In ADC A, programs 0 to 2 are assigned to six trigger signals from PMD0 and programs 3 and 4
W
U
R
V
reg0
reg1
reg2
reg0
INT
INT
PMD0 V PMD0 W PMD0 U
PMD0 U PMD0 V PMD0 W
and Two ADCs
PMD0
PMD0
0 ,3
0 ,3
AIN2C
AIN5C
A
AIN0
AIN1
0
AIN0
AIN1
AIN2
0
-
ADC A
ADC B
PMD0
PMD0
1,4
1,4
A
1
1
-
PMD0
PMD0
2,5
2,5
PMD0TRGn
A
2
2
-
TMPM370 17-48
(n = 0～5)
PMD1TRGn
(n = 6, 7)
6
2
PMD1
R
6
3
-
PMD 0
PMD 1
PMD1
R
7
4
B
INTADAPDA
INTADAPDB
Analog/ Digital Converter
TMPM370