TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 336

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

17.3.5.3 PMD Trigger Program Setting Registers 0 to 5
select phase-U, phase-V or phase-W. The <AINSPnm> bits are used to select the AIN pin to be
used. The numbers of the PMD Trigger Program Setting Registers correspond to those of the
Conversion Result Registers.
These four registers are used to select the AD conversion input pin (AINA0 to AINA14, AINB0 to
AINB16) to be used and select phase of the Vector Engine. The numbers of these registers
correspond to those of the Conversion Result Registers.
Setting the <ENSPnm> to 1 enables the ADxPSETnm register. The <UVWISnm> bits are used to
Each of the PMD Trigger Program Registers (ADxPSET0 to 5) are comprised of four registers.
(n= 0 to 5 , m= 0 to 3)
TMPM370 17-20
Analog/ Digital Converter
TMPM370