TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 168
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TMPM370FYFG
Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM370FYFG.pdf
(498 pages)
Specifications of TMPM370FYFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
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Counter Clock
(Internal Clock)
TB0IN Input PIn
(External Trigger Pulse)
TB0RG0 Match
TB0RG1 Match
TB0OUT (Timer Output) P in
9.6.4
Using an external count start trigger enables one-shot pulse generation with a short delay.
(1) The 16-bit up-counter (UC) is programmed to count up on the rising edge of the TB0IN pin
(2) To enable the trigger for timer flip-flop, sets TB0FFCR<TB0E1T1, TB0E0T1> to 11. With this
(3) Sets TB0RUN<TB0RUN> to 1 to enable the count-up by an external trigger.
(4) After the generation of one-shot pulse by the external trigger, to disable reverse of the timer
Figure 9-5 shows one-shot pulse generation, with annotations showing (d) and (p).
flip-flop or to stop 16bit counter by TB0RUN<TB0RUN> setting.
(TB0CR<TRGSEL0,CSSEL0>=”01”). The TB0RG0 is loaded with the pulse delay (d), and the
TB0RG1 is loaded with the sum of the TB0RG0 value (d) and the pulse width (P). The above
settings must be done while the 16-bit up-counter is stopped (TB0RUN<TB0RUN>=0).
setting, the timer flip-flop reverses when 16-bit up-counter (UC) corresponds to TB0RG0 or
TB0RG1.
Fig. 9-5 One-shot pulse generation using an external count start trigger (with a delay)
External trigger Programmable Square Wave Output Mode (PPG)
0
Toggle is disabled for a
capture into CAP1.
The counter starts at the rising edge of external trigger.
Toggle is
enabled.
Delay
TMPM370 9-25
(d)
d
Toggle is
enabled.
INTTB00 is
generated.
Pulse
(p)
d + p
INTTB01
is generated.
16-bit Timer/Event Counters
TMPM370
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