TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 311

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

16.3.6 Sync Trigger Generation Circuit
PM DnTRGC MP2
PM DnTRGC MP3
PMD nT RGCM P0
VE:VTRGC MP 0
PMD nT RGCM P1
VE:VTRGC MP 1
with PWM. The ADC trigger signal (PMDTRG) is generated by a match between MDCNT and TRGCMP.
The signal generation timing can be selected from up-count match, down-count match and
up-/down-count match. When the edge-aligned PWM mode is selected, the ADC trigger signal is
generated on an up-count match. When PWM output is disabled (MDEN<PWMEN>=0), trigger output is
also disabled.
TRGSEL register setting or sector information from the Vector Engine.
The sync trigger generation circuit generates trigger signals for starting ADC sampling in synchronization
When the trigger select output mode is selected, the trigger output port is switched according to the
PMD nMODES EL
Buffer
Buffer
Buffer
Buffer
Figure 16-7 Sync Trigger Generation Circuit
MD CNT
A=B
A=B
A=B
A=B
TMPM370 16-27
PMDn TRGCR
S lo pe S elect
PW MSync Signal
updn PTENC
TRG 1
TRG 2
TRG 3
T RG0
Trigger Output
Mode
Trigg er Outp ut
Select
Sector Inform ation
Motor control circuit
TMPM370
PM DTRG0
PM DTRG1
PM DTRG2
PM DTRG3
PM DTRG4
PM DTRG5