TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 234

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

12.3.2 Setting the Lower and Higher Frequency for Detection
12.3.3 Oscillation Frequency Detection Reset
Table 12-2 High frequency and Setting value for detection frequency
High frequency
(PLL OFF)
(PLL OFF)
(PLL ON)
(PLL ON)
10MHz
64MHz
80MHz
8MHz
OFDMXPLLON registers. The relation between the setting value to these registers and the detection
frequency is shown in Table 12-2.
frequency specified by OFDMXPLLOFF/CLKCMXPLLON, the oscillation frequency detector outputs
a reset signal for all I/Os.
oscillation frequency detection reset is released.
The detection frequency is specified by OFDMNPLLOFF, OFDMNPLLON, OFDMXPLLOFF and
If the TMPM370 detects lower frequency specified by OFDMNPLLOFF/OFDMNPLLON or higher
When the oscillation resumes its normal frequency and continues for some period (T
a. When the high frequency oscillation becomes abnormal
b. When the high frequency oscillation stops
(T
detection reset initializes all I/Os except power supply pins, RESET, X1 and X2 become
high impedance.
quency detection reset is generated. By oscillation frequency detection reset initializes all I/
Os except power supply pins, RESET, X1 and X2 become high impedance. However, since
the internal circuitries such as CPU are initialized by a reset signal latched by high fre-
quency, the internal circuitries hold the state at the oscillation frequency detection.
When an abnormal (lower or higher) frequency oscillation continues for some period
When the high frequency oscillation stops for some period (T
OFD
Range
Lower
Upper
Lower
Upper
Lower
Upper
Lower
Upper
), the oscillation frequency detection reset is generated. By oscillation frequency
Detection frequency
range [MHz]
≥124.16
≥ 15.52
≤ 32.96
≥ 155.2
≤ 4.12
≤ 5.15
≥ 19.4
≤ 41.2
TMPM370 12-6
Non detection frequency
range [MHz]
≥ 62.08
≤ 65.92
≥ 7.76
≤ 8.24
≤ 10.3
≥ 77.6
≤ 82.4
≥ 9.7
Oscillation Frequency Detector (OFD)
OFDMNPLLOFF
OFDMXPLLOFF
OFDMNPLLOFF
OFDMXPLLOFF
OFDMNPLLON
OFDMXPLLON
OFDMNPLLON
OFDMXPLLON
Setting value Decimal (Hex)
OFD
), the oscillation fre-
379 (0x17B)
473 (0x1D9)
190 (0xBE)
238 (0xEE)
24 (0x18)
47 (0x2F)
30 (0x1E)
59 (0x3B)
TMPM370
OFD
), the