TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 191

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

Transmit buffer 2
Transmit buffer 1
TX FIFO
INTTX0
TBEMP
TXE
I/O interface mode with SCLK input (normal mode):
SC0MOD1<6:5>=10: Transfer mode is set to half duplex mode.
SC0FCNF <4:0> = 01001: Allows continued transmission after reaching the fill level.
SC0TFC <1:0> = 00: Sets the interrupt to be generated at fill level 0.
In this condition, data transmission can be initiated along with the input clock by setting the
transfer mode to half duplex, writing 5 bytes of data to the transmit buffer and the transmit
FIFO, and setting the <TXE> bit to “1.” When the last transmit data is moved to the transmit
buffer, the transmit FIFO interrupt is generated.
SC0TFC <7:6> = 11: Clears the receive FIFO and sets the condition of interrupt
Data 5
Data 4
Data 3
Data 2
Data 1
Fig. 10-9 Transmit FIFO Operation
Data 5
Data 4
Data 3
Data 2
Data 1
generation.
TMPM370 10-20
Data 3
Data 5
Data 4
Data 2
Data 4
Data 5
Data 3
Data 5
Data 4
Data 5
Serial Channel
TMPM370