EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 802

IC STRATIX FPGA 40K LE 956-BGA

EP1S40B956C5

Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S40B956C5

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Using Enhanced Configuration Devices
Figure 12–13. CPF Setup for Initial Programming File (Auto Addressing)
12–24
Stratix Device Handbook, Volume 2
A sample memory map output file for the preceding setup is shown
below. Configuration option bits and page 0 data occupy main flash
sectors 0 through 4. See the Sharp LHF16J06 Flash memory used in EPC16
devices Data Sheet at www.altera.com to correlate memory addresses to
the EPC16 flash sectors. In auto addressing mode, page 1 allocates all
unused flash sectors. For this example, this unused area includes main
sectors 5 through 30, and all of the bottom boot sectors. While this large
portion of memory is allocated for page 1, the real application
configuration data is top justified within this region with filler 1'b1 bits in
lower memory addresses. Notice that the page 1 configuration data
Altera Corporation
September 2004

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