EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 614
EP1S40B956C5
Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S40B956C5
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S40B956C5
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- Current page: 614 of 864
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Infinite Impulse Response (IIR) Filters
7–36
Stratix Device Handbook, Volume 2
This cascaded structure rearranges the transfer function. This is shown in
the equation below, where each product term is a second order IIR filter.
If n is odd, the last product term is a first order IIR filter:
Figure 7–21
Figure 7–21. Cascaded IIR Filter
Basic IIR Filters
In this section, the basic IIR filter is implemented using cascaded second
order blocks or biquads in the direct form II structure.
Basic IIR FIlter Implementation
Multiplier blocks, adders and delay elements can implement a basic IIR
filter. The Stratix architecture lends itself to IIR filters because of its
embedded DSP blocks, which can easily be configured to perform these
operations. The altmult_add megafunction can be used to implement
the multiplier-adder mode in the DSP blocks.
implementation of an individual biquad using Stratix and Stratix GX DSP
blocks.
H z
x(n)
=
shows the cascaded structure.
C
C
n
H (z)
+
k
1
1
=
1
2
a
--------------------------------------------------- -
1
0k
+
+
b
a
1k
1k
z
z
1 –
H (z)
1 –
k
+
+
b
a
2k
2k
z
z
2 –
2 –
Figure 7–22
=
C
H (z)
n
n
Altera Corporation
+
k
1
=
September 2004
shows the
1
2
H
y(n)
k
z
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