EP1S40B956C5 Altera, EP1S40B956C5 Datasheet - Page 789

IC STRATIX FPGA 40K LE 956-BGA

EP1S40B956C5

Manufacturer Part Number
EP1S40B956C5
Description
IC STRATIX FPGA 40K LE 956-BGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S40B956C5

Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
683
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
956-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Altera Corporation
September 2004
AnF
PGM[2..0]
Wd_en
Wd_timer
[11..0]
Table 12–4. Control Register Contents
Parameter
Current configuration is factory or
applications
Page mode selection
User watchdog timer enable
User watchdog timer time-out value 12 bits ‘0’
Figure 12–7. Remote System Configuration Control Register
Table 12–4
The status register specifies the reason why re-configuration has occurred
and determines if the re-configuration was due to a CRC error, nSTATUS
pulled low due to an error, the device core caused an error, nCONFIG was
reset, or the watchdog timer timed-out.
specify the content of the status register.
Figure 12–8. Remote System Configuration Status Register
Definition
shows the content of the control register upon POR.
Remote System Configuration with Stratix & Stratix GX Devices
Wd
4
nCONFIG
1 bit ‘1’
1 bit ‘0’
3 bits ‘001’
3 bits ‘000’
1 bit ‘0’
POR Reset Value
3
CORE
2
Stratix Device Handbook, Volume 2
Figure 12–8
nSTATUS
Applications
Factory
High order bits of 29 bit counter
Local configuration
Remote configuration
1
and
Comment
CRC
0
Table 12–5
12–11

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